Heracles – Automated SI Signoff for High Speed Design
Heracles was the first SI signoff tool for high speed designs, and integrated a novel hybrid full-wave EM solver with the same accuracy order as the conventional 3D solver but an order of magnitude faster speed is developed. The hybrid solver takes advantage of the layered nature of the PCB layout and adopts the idea of layer-by-layer decomposition to reduce the complexity of the problem and achieve the computation speed optimized for full board crosstalk scan. With automated SI signoff flow, we are able to achieve the complete full board crosstalk scan in a few hours as intended with using the tool, which significantly reduces the post-layout check time, allows layout optimization, and ensures the full board coverage.
- Signal integrity sign-off becomes critical for high speed PCB designs. Traditionally 3D EM solver is expensive to run such a simulation, especially scan the board to identify any violation for the sign-off purpose.
- Heracles enables SI engineers to scan the via pin field and breakout region under connectors or BGA packages for impedance and crosstalk violation with its novel full-wave solver technology which has the same accuracy as the traditional 3D solver but an order of magnitude faster.
- Crosstalk metrics such as frequency domain integrated crosstalk noise (ICN) or time domain waveform TDT are derived from the S-parameter to quantify crosstalk.
- Heracles’s Impedance Scan flow can quickly check geometry and electrical design rules, which can improve working efficiency.